The present invention relates to semiconductor die encapsulation and, more particularly, to an encapsulation scheme that provides for improved adhesion of the encapsulant to an underlying printed circuit board.
Plastic encapsulates are commonly used in integrated circuit packaging to protect the integrity of the encapsulated semiconductor die and the associated electrical connections. U.S. Pat. No. 5,701,034 (Marrs) is directed to providing improved encapsulation of a semiconductor die and teaches the formation of a locking moat in a heat sink to which the semiconductor die is coupled. The encapsulant material is cured in the locking moat of the heat sink and about the semiconductor die to interlock the encapsulant and the heat sink. The teachings of U.S. Pat. No. 5,701,034 are not, however, related to improving adhesion or coupling of the encapsulant to resin laminates commonly utilized to form printed circuit boards. Further, the design of the locking moats and the structure of the heat sink in the '034 patent do not complement each other to provide for an efficient method of manufacture.
In many instances, a semiconductor die is positioned on the upper surface of a printed circuit board substrate and an encapsulant is arranged to cover the semiconductor die, portions of the upper surface of the substrate, and any leads, bond pads, or other bonding locations on the upper surface of the substrate. Robust encapsulant-to-substrate adhesion is critical in this type of structure because the encapsulant contacts only the upper surface of the substrate, as opposed to completely surrounding the substrate and die.
In practice, encapsulant-to-substrate adhesion is limited by specific design constraints. For example, the upper surface of the substrate typically includes conductive portions and solder resist portions. It is often difficult to identify a suitable encapsulant that bonds equally well to the conductive portions and the solder resist portions. Further, the encapsulant material must also be selected to minimize the deleterious effects of particulate matter contaminating the surface of the substrate. All of these design considerations limit the ability to achieve sufficient encapsulant-to-substrate adhesion.
Accordingly, there is a need for a semiconductor die encapsulation scheme that provides for optimum encapsulant-to-substrate adhesion while accounting for variations in the composition of the substrate surface and for the deleterious effects of particulate matter on the surface of the substrate, particularly where the substrate involved is a printed circuit board laminate. Further, there is a need in the art for an encapsulation scheme that is directed to improving adhesion or coupling of the encapsulant to the resin laminates commonly utilized to form printed circuit boards.